@techreport{OPUS4-1902, title = {VoiceXML-Applications for E-Commerce and E-Learning}, url = {https://nbn-resolving.org/urn:nbn:de:hbz:dm13-19028}, pages = {4}, year = {2005}, abstract = {Forschungsbericht Projektleiter: Peter J. A. Reusch Zeitraum: 2001-2004 Mitarbeiter: Bastian Stoll, Daniel Studnik F{\"o}rderung: Fachhochschule Dortmund, Forschungssemester}, language = {en} } @techreport{OPUS4-2091, title = {The ReAl Computer Architecture}, url = {https://nbn-resolving.org/urn:nbn:de:hbz:dm13-20911}, pages = {2}, year = {2011}, abstract = {Forschungsbericht Projektleiter: Wolfgang Matthes Zeitraum: 2009-2011}, language = {en} } @phdthesis{Koers2024, type = {Master Thesis}, author = {Koers, Lars}, title = {Setup of test environments based on a Xilinx Zynq SoC for measuring the leakage current and for radiation qualifcation of SRAM based FPGAs}, doi = {10.26205/opus-3803}, url = {https://nbn-resolving.org/urn:nbn:de:hbz:dm13-38039}, pages = {136}, year = {2024}, abstract = {This thesis discusses the development of test environments using Xilinx Zynq System on Chip (SoC) for measuring leakage currents and radiation qualification of Static Random Access Memory (SRAM) based Field Programmable Gate Arrays (FPGAs) at European Organisation for Nuclear Research (CERN). The effects of radiation on electronic components are explained, followed by an introduction to the FPGAs used. The GateMate FPGAs leakage current is measured in its application area with respect to temperature and core voltages. A comparable testing environment is used from the tester to the tested device, as it will later be used at CERN. The GateMate is being prepared in this setup for the finalization of radiation qualification at CERN, to be transferred later. For this purpose, the basic tests are explained and the outstanding tests are then carried out. The Lattice iCE40 UltraLite FPGA is used in an initial application test to determine its suitability for further radiation qualification tests at CERN. The analysis and presentation of the test results are followed by a summary and outlook.}, language = {en} } @techreport{Vormann2023, type = {Working Paper}, author = {Vormann, Claus}, title = {Say what you pay? Pay Information Disclosure in German Job Postings}, doi = {10.26205/opus-3740}, url = {https://nbn-resolving.org/urn:nbn:de:hbz:dm13-37407}, pages = {13}, year = {2023}, abstract = {Purpose - Pay transparency is a promising topic both for research and practice. In particular, the new European directive on compensation transparency will increase its importance. However, research is still relatively sparse compared to other areas of HRM. In particular, state-of-the-art and use of pay information disclosure in job postings is neglected. This paper aims to shed light on this HRM topic. Methodology - The paper summarizes the findings of a preliminary study conducted among German companies researching the proportion of firms offering compensation information in job postings and digging into the reasons behind it. Findings - Only 17 \% of the participating companies disclose meaningful information about compensation in their job postings. Doing so mainly depends on the company's attitude towards pay transparency. The age of the company has a minor negative influence, i.e.~older companies are less prone to disclose salary information. Industry, size, and existing overall pay transparency in the company do not determine if pay information is disclosed in job postings. Research limitations - The main limitation of this survey is its small size of 88 participants and the snowball sampling approach employed. This limits its representativeness and calls for follow-up studies involving more companies and a wider variation of positions included. Practical implications - While the EU directive will make it obligatory to communicate about pay before the first interview, some companies do it already. The study helps HR departments that think about changing their practice before it becomes compulsory to better judge the current standards.}, language = {en} } @book{NielsenBergerGilutzetal.2019, author = {Nielsen, Jakob and Berger, J. M. and Gilutz, Shuli and Whitenton, Kathryn}, title = {Return on Investment (ROI) for Usability}, publisher = {Nielsen Norman Group}, address = {Fremont, CA}, pages = {217}, year = {2019}, abstract = {Learn techniques for estimating the cost of usability activities and measuring improvements based on hundreds of development projects and 72 case studies. We present techniques for converting usage metrics into business gains for different industries (e.g., intranets, e-commerce, marketing, software, and electronics and hardware products). This 212-page report includes 131 screenshots of before and after designs, and discussions of design elements that increase business metrics.}, language = {en} } @phdthesis{Jung2023, type = {Master Thesis}, author = {Jung, Richard}, title = {Radiation Qualification of the Cologne Chip GateMate A1 FPGA}, doi = {10.26205/opus-3364}, url = {https://nbn-resolving.org/urn:nbn:de:hbz:dm13-33643}, pages = {118}, year = {2023}, abstract = {In this thesis, the radiation sensitivity of the novel Cologne Chip GateMate A1 field-programmable gate array (FPGA) is evaluated. An initial introduction of radiation mechanisms and their effects on electronics is given, followed by a brief overview of radiation test standards. The common elements present in FPGAs are discussed, which is followed by details of the GateMate FPGA device and a description of the software design flow. Afterwards, the development of a purpose-built printed circuit board (PCB) for radiation tests with the GateMate FPGA is detailed. Four components of the GateMate have been tested during three radiation campaigns, as well as a benchmark circuit to compare the radiation performance of the GateMate with other FPGAs tested at the European Organization for Nuclear Research (CERN). The test architecture consists of the device under test (DUT) FPGA and a TESTER FPGA whose task is to provide inputs to the DUT and record its response. The DUT and TESTER designs developed for all tests are discussed in detail. Finally, the results obtained during the irradiation campaigns are presented, showing that the GateMate FPGA performs similarly to other FPGAs using the same process technology. Only the benchmark test was not finalized, as implementation problems prevented its completion in the given time frame. The thesis concludes with a comprehensive summary and outlook.}, language = {en} } @article{LattnerGeller2023, author = {Lattner, Yannick and Geller, Marius}, title = {Radial Turbocompressor Chord Length Approximation for the Reynold's Number Calculation}, doi = {10.26205/opus-3335}, url = {https://nbn-resolving.org/urn:nbn:de:hbz:dm13-33351}, year = {2023}, abstract = {We present an approximation model for the chord length of radial turbocompressors. The model enables the calculation of a compressor's chord Reynold's number during the machine design process. The chord Reynold's number is shown to be the most accurate representation of the fluid dynamic properties inside the radial turbocompressor's impeller. It — however — requires the computation of the chord length, which is only available after defining the final impeller geometry. The method presenting in this paper only employs the compressors principal dimensions to approximate the chord length. The chord is modelled using a B{\´e}zier spline and quarter ellipse. This enables the earlier use of the chord Reynold's number during the machine design process of radial turbocompressors.}, language = {en} } @phdthesis{Shi2022, type = {Master Thesis}, author = {Shi, Yanchen}, title = {Power Simulation of a MIPS microAptiv UP Core implemented as a virtual ASIC prototype in a 65nm CMOS technology}, doi = {10.26205/opus-3217}, url = {https://nbn-resolving.org/urn:nbn:de:hbz:dm13-32171}, pages = {93}, year = {2022}, abstract = {This thesis presents a power simulation of a MIPS MicroAptiv UP Core implemented as a virtual ASIC prototype using Taiwan Semiconductor Manufacturing Company(TSMC) 65 nm CMOS technology. Based on the MIPS instruction set program data is generated and introduced in the simulation by means of initialization files. Before the simulation, technology specific SRAM modules are integrated into theMIPS core. Two different programs are used for power characterization. The first program performs frequent memory accesses by means of load/store word instructions, while the second program is a loop which operates on registers only and mainly increments addresses. The simulation is based on a virtual prototype which is generated by synthesis and place \& route including post-layout parasitic extractions. The stimuli for the power extraction is generated via gate-level simulation and forwarded to the power calculation engine. The effect of X-propagation on gate-level simulations is avoided by modifying the address-related statements in the execution data path module, which use another form of 2 to 1 multiplexer, setting the output to zero for all input signals even with an initial value of 'x' without changing the functionality. Finally, the consumed power is provided by reports generated by the power simulation engine. The memory-centric program consumes 35.39mW of internal power using instructions, which is 0.73mW less than the internal power of the register-centric program, and the overall average power is also lower by almost 0.7mW.}, language = {en} } @techreport{OPUS4-2014, title = {Personenverfolgung - Image and Vision Computing, Special Issue on Computer Vision Methods for Ambient Intelligence}, url = {https://nbn-resolving.org/urn:nbn:de:hbz:dm13-20140}, pages = {6}, year = {2008}, abstract = {Forschungsbericht Projektleiterin: Gabriele Peters Zeitraum: 2007}, language = {en} } @article{BlomeM{\"o}llerB{\"o}ning2019, author = {Blome, Frerk and M{\"o}ller, Christina and B{\"o}ning, Anja}, title = {Open House? - Class-specific career opportunities within German universities}, series = {Social Inclusion}, volume = {7 (2019)}, number = {1}, issn = {2183-2803}, url = {https://nbn-resolving.org/urn:nbn:de:hbz:dm13-20184}, pages = {101 -- 110}, year = {2019}, abstract = {This article focuses on the development of class-specific inequalities within German universities. Based on data on the social origin of students, doctoral students, and professors in the long-term cross-section, the article views the empirically observable dynamic of social closure of higher education since the 1950s. The focus of interest is on the level of the professorship. Data show that career conditions for underprivileged groups have deteriorated again. This finding is discussed in the context of social closure theories. The article argues that closure theories consider social closure processes primarily as intentional patterns of action, aimed at a strategic monopolization of participation, and securing social power. Such an analytical approach means that unintended closure processes remain understudied. Our conclusion is that concealed modes of reproduction of social structures ought to be examined and theorized more intensively due to their importance for the elimination of social inequality within universities.}, language = {en} }