@phdthesis{Winkler2019, type = {Master Thesis}, author = {Winkler, Florian}, title = {Verification of the Shunt-Low-Dropout voltage regulator for the current based supply of the serially connected pixel detector modules of the ATLAS- and CMS-experiments at the High-Luminosity Large Hadron Collider}, doi = {10.26205/opus-3059}, url = {https://nbn-resolving.org/urn:nbn:de:hbz:dm13-30597}, pages = {71}, year = {2019}, abstract = {Diese Ausarbeitung dokumentiert die Verifikation des Shunt-Low-Dropout-Spannungsreglers f{\"u}r den Einsatz im ATLAS- und CMS-Projekt. Im Rahmen einer Kooperation zwischen der Fachhochschule Dortmund und dem Forschungsinstitut CERN in Genf wird eine integrierte CMOS Schaltung zur seriellen, strombasierten Spannungsregelung der Pixeldetektormodule entwickelt. Der Fokus dieser Masterthesis ist die simulationstechnische Verifikation unter Ber{\"u}cksichtigung der spezifizierten Einsatzbedingungen in den Experimenten und umfasst - neben einer Einf{\"u}hrung in den Shunt-LDO Regler auf Basis des Testchip C - die Vorstellung und Dokumentation der erarbeiteten Simulationsergebnisse.}, language = {de} } @book{UrbanBeckerBraeckleinetal.2021, author = {Urban, Gerald A. and Becker, Kurt and Braecklein, Martin and Habenstein, Birgit and Knaup, Petra and Melzer, Andreas and Stieglitz, Thomas and Urban, Gerald and Zaunseder, Sebastian}, title = {Technologische Souver{\"a}nit{\"a}t in der Biomedizinischen Technik - der Mensch im Fokus}, publisher = {VDE Verband der Elektrotechnik Elektronik Informationstechnik}, address = {Frankfurt am Main}, pages = {52}, year = {2021}, language = {de} } @article{PielmusM{\"u}hlstefBreschetal.2021, author = {Pielmus, Alexandru-Gabriel and M{\"u}hlstef, Jens and Bresch, Erik and Glos, Martin and Jungen, Christiane and Mieke, Stefan and Orglmeister, Reinhold and Schulze, Andreas and Stender, Birgit and Voigt, Verena and Zaunseder, Sebastian}, title = {Surrogate based continuous noninvasive blood pressure measurement}, series = {Biomedical Engineering}, volume = {66 (2021)}, number = {3}, issn = {0013-5585}, pages = {231 -- 246}, year = {2021}, language = {en} } @phdthesis{Fr{\"o}se2019, type = {Master Thesis}, author = {Fr{\"o}se, Tobias}, title = {Strahlenharter CAN Physical Layer in 65 nm CMOS Technologie f{\"u}r das Kontrollsystem des ATLAS Pixeldetektors}, doi = {10.26205/opus-3064}, url = {https://nbn-resolving.org/urn:nbn:de:hbz:dm13-30649}, pages = {95}, year = {2019}, abstract = {Die vorliegende Masterthesis beschreibt die Entwicklung eines Strahlenharten CAN Physical Layer in einer 65 nm CMOS Technologie f{\"u}r das Kontrollsystem des ATLAS Pixeldetektors. Dieser CAN Physical Layer ist Bestandteil des DCS Chips (Detector Control System), der im Rahmen des Upgrades des ATLAS Pixeldetektors zum High Luminosity Large Hadron Collider (HL-LHC) entwickelt wird. Die Aufgabe des DCS Chips ist die Steuerung und {\"U}berwachung der Sensorik des ATLAS Pixeldetektors. Die Transistoren der verwendeten Technologie d{\"u}rfen mit maximal 1,2 Volt betrieben werden. Um dennoch die Kompatibilit{\"a}t zum CAN Standard beizubehalten ist es notwendig mit wesentlich h{\"o}heren Spannungspegeln zu arbeiten. Im Verlauf dieser Masterthesis werden zu diesem Zweck ein CAN Treiber, ein Levelshifter und ein CAN Empf{\"a}nger entworfen, die dazugeh{\"o}rigen Layouts erstellt und die Eigenschaften der Schaltungen auf dem ersten gefertigten Prototyp des DCS Chips vermessen.}, language = {de} } @book{OPUS4-2098, title = {Smart Energy 2018}, editor = {Großmann, Uwe and Kunold, Ingo and Engels, Christoph}, publisher = {Verlag Werner H{\"u}lsbusch}, address = {Gl{\"u}ckstadt}, isbn = {978-3-86488-144-2}, pages = {256}, year = {2018}, language = {de} } @book{OPUS4-2099, title = {Smart Energy 2017}, editor = {Großmann, Uwe and Kunold, Ingo and Engels, Christoph}, publisher = {Verlag Werner H{\"u}lsbusch}, address = {Gl{\"u}ckstadt}, isbn = {978-3-86488-125-1}, pages = {158}, year = {2017}, language = {de} } @book{OPUS4-2100, title = {Smart Energy 2016}, editor = {Großmann, Uwe and Kunold, Ingo and Engels, Christoph}, publisher = {Verlag Werner H{\"u}lsbusch}, address = {Gl{\"u}ckstadt}, isbn = {978-3-86488-112-1}, pages = {120}, year = {2016}, language = {de} } @book{OPUS4-2101, title = {Smart Energy 2015}, editor = {Großmann, Uwe and Kunold, Ingo and Engels, Christoph}, publisher = {Verlag Werner H{\"u}lsbusch}, address = {Gl{\"u}ckstadt}, isbn = {978-3-86488-093-3}, pages = {134}, year = {2015}, language = {de} } @article{BeharLiuKotzenetal.2020, author = {Behar, Joachim A. and Liu, Chengyu and Kotzen, Kevin and Tsutsui, Kenta and Corino, Valentina D. A. and Singh, Janmajay and Pimentel, Marco A. F. and Warrick, Philip and Zaunseder, Sebastian and Andreotti, Fernando}, title = {Remote health diagnosis and monitoring in the time of COVID-19}, series = {Physiological Measurement}, volume = {41 (2020)}, number = {10}, issn = {1361-6579}, year = {2020}, language = {en} } @phdthesis{Jung2023, type = {Master Thesis}, author = {Jung, Richard}, title = {Radiation Qualification of the Cologne Chip GateMate A1 FPGA}, doi = {10.26205/opus-3364}, url = {https://nbn-resolving.org/urn:nbn:de:hbz:dm13-33643}, pages = {118}, year = {2023}, abstract = {In this thesis, the radiation sensitivity of the novel Cologne Chip GateMate A1 field-programmable gate array (FPGA) is evaluated. An initial introduction of radiation mechanisms and their effects on electronics is given, followed by a brief overview of radiation test standards. The common elements present in FPGAs are discussed, which is followed by details of the GateMate FPGA device and a description of the software design flow. Afterwards, the development of a purpose-built printed circuit board (PCB) for radiation tests with the GateMate FPGA is detailed. Four components of the GateMate have been tested during three radiation campaigns, as well as a benchmark circuit to compare the radiation performance of the GateMate with other FPGAs tested at the European Organization for Nuclear Research (CERN). The test architecture consists of the device under test (DUT) FPGA and a TESTER FPGA whose task is to provide inputs to the DUT and record its response. The DUT and TESTER designs developed for all tests are discussed in detail. Finally, the results obtained during the irradiation campaigns are presented, showing that the GateMate FPGA performs similarly to other FPGAs using the same process technology. Only the benchmark test was not finalized, as implementation problems prevented its completion in the given time frame. The thesis concludes with a comprehensive summary and outlook.}, language = {en} }